訂購產品一般會在 4個工作日內送抵臺灣 (視地點而定)。
訂購金額達 新臺幣1400元或以上即可免費運送至臺灣。 訂單金額低於 新臺幣1400元則需收取運費 600元。
UPS 運費預付: DDP (關稅由 DigiKey 支付,稅賦在送達時收取)僅接受以信用卡和 PayPal 付款。
FedEx 或 DHL 運費預付: CPT (相關稅賦與關稅在送達時收取) 僅接受以信用卡和 PayPal 付款。
![]()
![]()
![]()
![]()


來自完整授權夥伴的更多產品
平均到貨時間為 1 至 3 天,可能需支付額外運費。 請參見產品頁面、購物車與結帳畫面瞭解實際的運送時程。
國貿條規:CPT (關稅和適用的 VAT/稅賦會在送達時收取)
如需更多資訊,請造訪說明與支援
Learn how to implement a bid/ask order book on an FPGA using SystemVerilog arrays to maintain best-bid and best-ask values.
Build a “Big Brother eye” that awakens in darkness using LDR sensing and Arduino code driving a GC9A01 LCD.
Create a DIY simple oscilloscope using Arduino Mega, an LCD, and push buttons to measure voltage, frequency, and more.
Previously, we looked at the peripheral side implementation of the Serial Peripheral Interface (SPI) protocol in SystemVerilog. Now, let’s take a closer look at designing the controller in SystemVerilog.
Learn how to build a circular FIFO in SystemVerilog with read/write control and pointer logic.
Explore how inverter sizing affects propagation delay and oscillation frequency in a ring oscillator.
Learn how to design and simulate an ITCH protocol parser in SystemVerilog for FPGAs. Explore the intersection of FPGA design and finance.
Learn how to design and simulate a SPI peripheral module in SystemVerilog using Quartus and Modelsim.
A beginner-friendly guide to detecting objects by color using OpenCV. Learn how to detect contours in images using OpenCV and HSV color masking.